ARTÍCULO

Layout-aware design methodology for a 75 GHz power amplifier in a 55 nm SiGe technology

Autores: del Río Orduña, David; Gurutzeaga Zubillaga, Iñaki; Solar Ruiz, Héctor; Beriain Rodríguez, Andoni; Berenguer Pérez, Roque José
Título de la revista: INTEGRATION-THE VLSI JOURNAL
ISSN: 0167-9260
Volumen: 52
Páginas: 208 - 216
Fecha de publicación: 2016
Lugar: WOS
Resumen:
This paper describes a method to design mmW PAs, by modeling the electromagnetic behavior of all the passive structures and the layout interconnections using a 3D-EM solver. It allows the optimization of the quality factor of capacitors (Q-factors > 20 can be obtained at 80 GHz), the access points and arrangement of the power transistor cells. The method is applied to the design and optimization of an E-Band PA implemented in a 55 nm SiGe BiCMOS technology. The PA presents a maximum power gain of 21.7 dB at 74 GHz, with a 3-dB bandwidth covering from 72.6 to 75.6 GHz. The maximum output P1dB is 13.8 dBm at 75 GHz and the peak PAE is 14.1%. (C) 2015 Elsevier B.V. All rights reserved.