Grupos Investigadores

Miembros del Grupo

Golpe Molinos
Lopez Gasso

Líneas de Investigación

  • Sensores RFID
  • Power harvesters
  • Electrónica integrada de bajo consumo
  • Diseño y caracterización de circuitos integrados
  • Comunicaciones en microondas y ondas milimétricas

Palabras Clave

  • uW
  • mmW
  • Sensors
  • RFID
  • Power harvester
  • Low voltage
  • Low power
  • CMOS

Publicaciones Científicas desde 2018

  • Autores: del Río Orduña, David (Autor de correspondencia); Gurutzeaga Zubillaga, Iñaki; Berenguer Pérez, Roque José; et al.
    ISSN 1531-1309 Vol.31 N° 2 2021 págs. 157 - 160
    This letter presents the design of a 140-160 GHz vector-modulator-type phase shifter, integrated in a 55-nm BiCMOS technology. The circuit is optimized to minimize the occupied area and maximize the linearity, facilitating its integration in D-band phased arrays. Test results show an average insertion loss of 4.5 dB, an OP 1 dB of -3.7 dBm, and rms gain/phase errors lower than 1.4 dB and 7.5 degrees. The circuit core occupies 0.05 mm(2), consuming less than 66 mW of dc power.
  • Autores: Lin, J. (Autor de correspondencia); Peng, H.; Yang, Q.; et al.
    Revista: ELECTRONICS
    ISSN 2079-9292 Vol.10 N° 5 2021 págs. 598
    In order to provide gigabit per second wireless communication, various standards have been proposed and implemented in recent years. Since the millimeter-wave (mm-wave) communication enables uncompressed high-speed data transfer with a minimum delay, it is considered to be the most promising technology to alleviate the pressure of the increasing demand of the spectrum resource. In this paper, a compact and highly efficient mm-wave transmitter is presented. The proposed injection-locked binary phase-shift keying (BPSK) transmitter can deliver a 10.2 dBm output with an efficiency over 10%. The proposed transmitter occupies 0.105 mm(2) chip area in 65 nm CMOS process.
  • Autores: Lin, J. F.; Boon, C. C.; Berenguer Pérez, Roque José; et al.
    ISSN 0013-5194 Vol.57 N° 11 2021 págs. 430 - 432
    This paper presents a millimeter-wave (mm-wave) V-band mixer. The source-driven transformer-coupled up-converter topology can alleviate the local oscillator (LO) leakage problem. The proposed V-band up-converter has been implemented on 65 nm CMOS technology. The experimental results show that the LO leakage level can be reduced to -43.1 dB. The up-converter occupies 0.11 mm(2) in area excluding signal pads.
  • Autores: Rezola Garciandía, Ainhoa (Autor de correspondencia); Sevillano Berasategui, Juan Francisco; del Río Orduña, David; et al.
    ISSN 0018-9480 Vol.68 N° 1 2020 págs. 339 - 351
    Changes in ambient temperature or chip temperature result in variations in the in-phase and quadrature (I/Q) gain and phase imbalance. As a consequence, the overall system performance can be seriously degraded, especially in wideband multi-Gb/s systems, where the I/Q imbalance is highly selective in frequency. Unless appropriately considered, temperature drifts can decrease the image rejection ratio (IRR) of the transmitter. This article presents a novel compensation method for temperature-dependent transmitter I/Q imbalance over the entire temperature range. It consists of a simple predistortion technique that, based on a few factory characterizations of gain and phase imbalance, is able to estimate and correct the I/Q imbalance at any temperature, without interrupting the normal functionality of the system. The proposed method is assessed in a 2-GHz, 64-QAM transceiver implemented with real hardware. The measurements show that the proposed approach is able to keep the IRR greater than 35 dB in the entire bandwidth and an error vector magnitude (EVM) lower than 3 over a temperature range of 70 C.
  • Autores: Astigarraga, Aingeru; Lopez-Gasso, Alberto; Golpe, Diego; et al.
    ISSN 2072-666X Vol.11 N° 11 2020 págs. 1013
    In this paper, a novel Radio-Frequency Identification (RFID) tag for "pick to light" applications is presented. The proposed tag architecture shows the implementation of a novel voltage limiter and a supply voltage (VDD) monitoring circuit to guarantee a correct operation between the tag and the reader for the "pick to light" application. The feasibility to power the tag with different photovoltaic cells is also analyzed, showing the influence of the illuminance level (lx), type of source light (fluorescent, LED or halogen) and type of photovoltaic cell (photodiode or solar cell) on the amount of harvested energy. Measurements show that the photodiodes present a power per unit package area for low illuminance levels (500 lx) of around 0.08 mu W/mm(2), which is slightly higher than the measured one for a solar cell of 0.06 mu W/mm(2). However, solar cells present a more compact design for the same absolute harvested power due to the large number of required photodiodes in parallel. Finally, an RFID tag prototype for "pick to light" applications is implemented, showing an operation range of 3.7 m in fully passive mode. This operation range can be significantly increased to 21 m when the tag is powered by a solar cell with an illuminance level as low as 100 lx and a halogen bulb as source light.
  • Autores: del Río Orduña, David (Autor de correspondencia); Gurutzeaga Zubillaga, Iñaki; Beriain Rodríguez, Andoni; et al.
    ISSN 1531-1309 Vol.29 N° 5 2019 págs. 351 - 353
    This letter presents the design of a compact, wideband, and high-efficiency E-band power amplifier, integrated in a 0.13-mu m BiCMOS process and occupying 0.3 mm(2). It consists of a single-stage balanced amplifier, with HBT transistors in cascode configuration. The power amplifier (PA) is biased in class AB, with a dc consumption of 156 mW. A compact bias circuit is employed to achieve temperature robustness, while the layout is optimized for wideband and highly efficient operation. Measurements show a peak power gain of 15.3 dB at 83 GHz, with a 29.3% fractional bandwidth and less than 1-dB degradation over a 25 degrees C-85 degrees C temperature range. The peak output power at saturation and 1-dB compression is 18.6 and 13.6 dBm, respectively, and the maximum power-added efficiency (PAE) is 30.7%.
  • Autores: del Río Orduña, David (Autor de correspondencia); Gurutzeaga Zubillaga, Iñaki; Rezola Garciandía, Ainhoa; et al.
    ISSN 0098-9886 Vol.46 N° 3 2018 págs. 366 - 374
    This paper presents the design of a compact and wide bandwidth millimeter-wave power detector, integrated at the output of an E-band power amplifier and implemented in a 55-nm SiGe BiCMOS process. It is based on a nonlinear PMOS detector core, and its measured output voltage tracks the output power of the PA from 67 to 90GHz. It provides an insertion loss lower than 0.2dB, and its responsivity can be tuned between 8 and 17V/W. The output bandwidth is bigger than 3GHz, which allows built-in self-test when transmitting multigigabit millimeter-wave signals.
  • Autores: del Río Orduña, David; Rezola Garciandía, Ainhoa; Sevillano Berasategui, Juan Francisco; et al.
    ISSN 978-3-319-93280-4 2019
    This book presents design methods and considerations for digitally-assisted wideband millimeter-wave transmitters. It addresses comprehensively both RF design and digital implementation simultaneously, in order to design energy- and cost-efficient high-performance transmitters for mm-wave high-speed communications. It covers the complete design flow, from link budget assessment to the transistor-level design of different RF front-end blocks, such as mixers and power amplifiers, presenting different alternatives and discussing the existing trade-offs. The authors also analyze the effect of the imperfections of these blocks in the overall performance, while describing techniques to correct and compensate for them digitally. Well-known techniques are revisited, and some new ones are described, giving examples of their applications and proving them in real integrated circuits.

Proyectos desde 2018

  • Título: Adquisicion de Analizador de espectro para caracterizacion de circuitos en logitudes de ondas milimetricas.
    Código de expediente: 2020-CIEN-000099-01
    Investigador principal: ROQUE JOSE BERENGUER PEREZ.
    Convocatoria: 2020 DFG Programa Red guipuzcoana de Ciencia, Tecnología e Innovación 2020
    Fecha de inicio: 15-07-2020
    Fecha fin: 30-09-2021
    Importe concedido: 27.965,00 €
    Fondos FEDER: NO
  • Título: Sistema sensor para jaulas de piscifactoría (FICASES)
    Código de expediente: TEC2017-89403-C2-1-R
    Investigador principal: HECTOR SOLAR RUIZ.
    Fecha de inicio: 01-01-2018
    Fecha fin: 30-09-2021
    Importe concedido: 124.630,00 €
    Fondos FEDER: NO
  • Título: Smart Sensing for Rapid Response to Chemical Treats on Soft Targets
    Código de expediente: 823895
    Investigador principal: ANDONI BERIAIN RODRIGUEZ
    Financiador: COMISIÓN EUROPEA
    Convocatoria: H2020-MSCA-RISE-2018
    Fecha de inicio: 01-10-2018
    Fecha fin: 30-08-2022
    Importe concedido: 62.950,00 €
    Fondos FEDER: NO